1. Field of the Invention
The present invention relates to a switching regulator, and more particularly, to a switching regulator for adjusting output errors by compensating the reference voltage.
2. Description of the Prior Art
Regulators usually include switching regulators and liner regulators. The characteristics of liner regulators are that they are cheap, easy to use and respond quickly. However the efficiency of liner regulators is poor, often consuming 50% of the power. Although a switching regulator has slow response, its power efficiency is great. Power consumption plays an important role in circuit design nowadays. As for a quick response requirement, switching regulators utilize a constant-time trigger to substitute for an error amplifier with additional frequency compensation elements used for controlling signal differences between PWM loops. The constant-time trigger is used for triggering a fixed on time or a fixed off time to control the whole switching regulator.
Please refer to FIG. 1. FIG. 1 is a diagram of a switching regulator 10 according to the prior art. The switching regulator 10 includes a power stage 12, an output capacitor Cout, a loading Rload, a reference voltage generator 14, a comparator 15, and a constant-time trigger 16. The power stage 12 includes a first switch SW1, a second switch SW2, an inverter 17, and an output inductor Lout. The second switch SW2 is coupled to the first switch SW1. The output inductor Lout is coupled to the first switch SW1 and the second switch SW2. The inverter 17 is coupled to the constant-time trigger 16 and a control end 104 of the second switch SW2 for processing an inverse operation on a signal outputted from the constant-time trigger 16. The output capacitor Cout is coupled to the output inductor Lout with an output voltage Vout across the capacitor. The output capacitor Cout further includes an equivalent series resistance ESR. The loading Rload is coupled to the output capacitor Cout and the output inductor Lout. The reference voltage generator 14 is used for generating a reference voltage Vref. The comparator 15 includes a first input end 152 coupled to the output inductor Lout and the output capacitor Cout for receiving a feedback voltage VFB (equals the output voltage Vout). The comparator 15 includes a second input end 154 coupled to the reference voltage generator 14. The constant-time trigger 16 is coupled to the comparator 15 and the power stage 12. The constant-time trigger 16 is used for controlling turning on and off the first switch SW1 and the second switch SW2 of the power stage 12 according to a result of the comparator 15. An input end 122 of the first switch SW1 is coupled to an input voltage Vin, and an input end 124 of the second switch SW2 is coupled to ground. The comparator 15 is an error comparator. The first switch SW1 and the second switch SW2 are metal-oxide semiconductor transistors (MOS). When the constant-time trigger 16 is an on-time trigger, the constant-time trigger 16 is used for controlling on time of the first switch SW1 and the second switch SW2. When the constant-time trigger 16 is an off-time trigger, the constant-time trigger 16 is used for controlling off time of the first switch SW1 and the second switch SW2.
Please refer to FIG. 2 and FIG. 1. FIG. 2 is a diagram illustrating signal waveforms in FIG. 1. The upper waveform is a variation of an inductor current IL in time, where it rises in a positive slope for a span and drops in a negative slope for a span. Due to the output voltage Vout equaling the feedback voltage VFB, the feedback voltage VFB could be represented as the product of the inductor current IL and the equivalent series resistance ESR. Assume that the constant-time trigger 16 is an on time trigger for controlling turning on the first switch SW1 for a fixed time TON. The comparator 15 is used for comparing the feedback voltage VFB and the reference voltage Vref. When the feedback voltage VFB is lower than the reference voltage Vref, the comparator 15 triggers a high level signal to the constant-time trigger 16. The constant-time trigger 16 controls the first switch SW1 to turn on for the fixed time TON and to turn off the first switch SW1. The constant-time trigger 16 turns on the second switch SW2 to form a loop.
Please refer to FIG. 3 that is a diagram illustrating signal waveforms in FIG. 1. The difference between FIG. 2 and FIG. 3 is that there are errors existing between the root mean square value (RMS) of the feedback voltage VFB and the reference voltage Vref. Due to the output voltage Vout equaling the feedback voltage VFB, the feedback voltage VFB could be represented as the product of the inductor current IL and the equivalent series resistance ESR. The root mean square value (RMS) of the feedback voltage VFB could be affected by changing the inductor current IL or the equivalent series resistance ESR. At this time, the errors existing between the root mean square value (RMS) of the feedback voltage VFB and the reference voltage Vref will be adjusted.
Output voltage compensation of a switching regulator application is already disclosed in U.S. Pat. No. 6,813,173 “DC-To-DC Converter with Improved Transient Response”. In U.S. Pat. No. 6,813,173, the method of work is utilizing the difference between the reference voltage Vref and the feedback voltage VFB to adjust the output voltage of system. The adjusted signal after comparison is added to the feedback voltage VFB.
Due to the root mean square value (RMS) of the feedback voltage VFB of the switching regulator 10 being affected by the inductor current IL and the equivalent series resistance ESR, there are errors generated between the feedback voltage VFB and the reference voltage Vref. The output voltage Vout generated by the switching regulator is not precise which cause more inaccuracy in a circuit requiring voltage accuracy.